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Stacked Dies

Beckermus related capabilities

  • Complex structure assembly:
    MEMS, ASIC, 2 voltaic cells, SMT, CMOS, filter.

  • Technologies: flip-chip inert soldering, conductive and nonconductive epoxy gluing, UnderFIll and wire bonding.


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Beckermus Technologies offers its clients multiple advanced packaging Techniques. Stacked Dies can be performed straight on the wafer (WLP) or on the second phase, after the wafer was diced and the chips will be bonded to PCB or Package


Experience shows that stacking of chips for example memory chips on top of each other not only reduces the amount of ‘real estate’ used but also improved the overall module performance. Electronic performance of stacked dies tends to offer substantial improvement of electrical performance by producing faster transmissions and use less energy creating the signals. Beckermus Technologies is proud to be part of the assembly institutes affected by  Moore’s Law to enable a whole new generation of tiny and super powerful microelectronics devices.


Stacking Process

Dies are usually connected to each other using wire bonding, It is important to carefully design and perform the bonding so that the reduction in the package size and volume footprint will not result in any kind of electronic disturbance.

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